Strain Si
Strain Si

  • Strain engineering is an important method to enhance the performance of advanced CMOS devices. Process-induced local strain, is currently the mainstream technology used to increase the  mobility in advanced CMOS transistors. 

  • Because of the epitaxial deposition technique, the germanium or carbon atoms substitutionally replace silicon atoms in the lattice. Germanium (5.66 Å) atoms are slightly larger than the lattice constant of silicon (5.43 Å), so SiGe on silicon exerts compressive strain on the silicon channel. Carbon has a much smaller lattice constant (3.56 Å), so silicon containing even a small amount of substitutional carbon exerts significant tensile stress on the channel.
  • The ratio to compensate carbon in Si by Ge atom is 10 :1.
  • eSiGe is used for PMOS application for several reasons. Recesses are etched in the source and drain regions and SiGe is selectively deposited in the recesses to introduce uniaxial compressive strain in the channel by using continuously increasing Ge concentration in the epi film. A SiGe material incorporates more boron than silicon alone, thus the junction resistivity is lowered. Also, the SiGe/silicide layer interface at the substrate surface has a lower Schottky barrier than the Si/silicide interface. Further, SiGe grown epitaxially on the top of silicon has compressive stress inside the film because the lattice constant of SiGe is larger than that of silicon. The compressive stress is transferred in the lateral dimension to create compressive strain in the PMOS channel and to increase mobility of the holes.

  • eSiC : For NMOS application, SiC can be used in the recessed areas to create tensile stress in the channel, since the lattice constant of SiC is smaller than that of silicon. The tensile stress is transferred into the channel and increases the electron mobility.
Last updated: 02/29/2012